Layout / Simulations Engineer Intern - Bucharest

Doar pentru membrii înregistrați Bucharest, România

2 săptămâni în urmă

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Job summary

We are looking for a talented Layout/Simulations Engineer Intern to join our team. As an intern, you will have the opportunity to work on state-of-the-art packaging designs and simulations.

Responsibilities

  • Interact with PD team optimize active die and perform package planning
  • Perform package design for a flip chip package based on existing netlist
  • Use Cadence Allegro Package Designer (APD)
  • Perform package specific SI/PI simulations

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